(1) Technical Field
The present invention relates to solid state semiconductor devices. More specifically, the present invention relates to a GaN/AlGaN heterojunction field effect transistor and a method for making such transistors.
(2) Discussion
GaN/AlGaN High Electron Mobility Transistors (HEMTs) are important for the creation of devices such as robust low noise amplifiers as well as high-power, low weight, microwave sources and Microwave/Millimeter-wave Monolithic Integrated Circuit (MMICs) that operate in the X-band. Microwave sources weighing only a few grams fabricated from GaN/AlGaN/SiC HEMTs can potentially deliver hundreds of Watts of microwave power at 10 GHz, and are suitable as components for phase-array radar and airborne radar applications.
Current techniques for producing GaN/AlGaN require a multi-step lithography process. In one example “baseline” process, a semiconductor layer structure is formed, and a photoresist is applied, forming a mask with areas exposed for future deposition of source and drain pads of an ohmic metal. Prior to the deposition of metal, an etching process is performed to remove portions of the semiconductor layer structure where the source and drain pads will be deposited. The photoresist material functions to shield a portion of the surface of the semiconductor layer structure during this etching process. After etching, an ohmic metal layer is applied to the entire surface of the semiconductor layer structure. The photoresist is then removed to eliminate deposited metal from the masked areas. After the photoresist has been removed, the device is annealed and a gate recess is etched through the exposed area to a desired depth. A gate is then added to the device and individual devices are then isolated.
In this process, a mesa is formed due because of the protection afforded by the photoresist material during the etching process. Further, the etching process results in a portion of the photoresist material being removed so that the top of the photoresist material “overhangs” the lower portion. During the deposition of the ohmic metal, this overhang results in portions of the etched area (thinned parts of the Schottky barrier) that are not completely covered by ohmic metal. As a result, the mobile two-dimensional electron gas (2 DEG) charge is reduced underneath these thinned unprotected parts of the Schottky barrier due to surface depletion. Also, photoresist material residues are generally left after the ohmic metal is lifted off (by removal of the photoresist material). During the annealing process, these residues tend to melt and flow, leaving residues on the active area of the device. During the subsequent addition of the gate, these residues are buried. Impurities underneath the gate metal generally adversely affect the performance of the resulting transistor devices. This baseline process and an example of a resulting structure are described in much greater detail as follows.
A GaN HEMT layer structure generated by the baseline process shown in FIG. 1, comprises a substrate 100, a 10 to 20 nm thick AlN or AlyGa(1-y)N nucleation layer 102, a 250 to 400 nm thick GaN layer 104, and 10 to 40 nm thick strained AlGaN Schottky barrier layer 106. In the structure shown, the desirable Al content x in a ternary AlxGa(1-x)N Shottky barrier layer could be any value between 0.1 and 0.4. For the purpose illustraton, a value of 0.3 for x and a Schottky barrier thickness of 30 nm are selected. The 2 DEG charge at the AlGaN/GaN interface is obtained by piezoelectric and spontaneous polarization caused by lattice mismatch induced strain between GaN and AlGaN Schottky barrier layer, and not by doping. The electron charge density is roughly proportional to Al content x in the Schottky barrier layer (affecting strain) and thickness of the Schottky barrier (affecting the surface charge depletion effect). The best combination of the 2 DEG sheet charge and the specific ohmic contact resistance is obtained for x values between 0.15 and 0.3 and Schottky barrier thickness between 20 nm and 40 nm. The upper value of the x and the thickness of the Schottky barrier are limited by the fact that barriers with an x value higher than 0.3 give poor ohmic contacts, and that strained barriers thicker than 40 nm cannot be grown due to strain relaxation.
After the semiconductor layer structure described above has been formed on the substrate, the baseline technique first defines source contact pad areas 200, and drain contact pad areas 202 are defined into a photoresist material 204 using image reversal process, as depicted in FIG. 2. In this figure, a typical layout of source pad areas 200 and drain pad areas 202 of a GaN power HEMT is presented. The source-drain separation depicted in this baseline process is 2 μm. The image reversal process is used to obtain undercut of the photoresist profile as shown in FIG. 3. As shown, a photoresist ledge 300 is created by the undercut, acting as a shadow mask during high vacuum metal evaporation and preventing metal from depositing onto the resist sidewalls 302. The resist profile undercut caused by this process is in the neighborhood of 0.25 μm. A scanning electron microscope (SEM) image of an example of such a photoresist profile is depicted in FIG. 4.
During the next fabrication step, areas unprotected by the photoresist material are etched by chlorine plasma in a reactive ion etching (RIE) system to reduce Schottky barrier thickness underneath the subsequently deposited contact metal. This step is called an ohmic recess etch, and regions in which Schottky barrier is etched are called recessed areas. Ohmic contact resistance is minimized when Schottky barrier underneath the ohmic metal is thinned between 7.5 nm and 10 nm. By using an ohmic recess etch process, 2 DEG sheet charge is reduced only in recessed areas, which are subsequently covered by ohmic metal and converted by chemical reaction with metal during a high temperature annealing step into a highly conductive heavily n-typed doped material. The cross-section of device structure after this fabrication step is shown in FIG. 5. The protected area of the AlGaN layer 500 under the photoresist material 204 forms a mesa 502.
After ohmic recess etch, the wafer is loaded into a high vacuum e-beam evaporator, and ohmic metals 600 are evaporated onto the structure, a cross-section of which is presented in FIG. 6. This figure also illustrates how this process results in incomplete metal coverage of the recessed areas 602, which is a major flaw. The recessed areas 602 not covered by the ohmic metal are termed unprotected recess areas. The unprotected recessed areas 602 have adverse effects on performance and reliability of GaN HEMT's because the 2 DEG sheet charge in unprotected recessed areas is too low to support the high current densities typical for GaN HEMT's. It is reasonable to assume that high electric fields and electron velocity saturation arise in these areas at high current densities, just as they do underneath the gate of the device. The presence of the second high field region in a HEMT degrades frequency response, power-added efficiency, and power handling capability of the device. It also contributes to needless heating of the device and hence accelerates device degradation. Device performance would be improved by elimination of the unprotected recessed areas.
The photoresist is lifted-off by soaking in a photoresist stripper followed by rinsing in de-ionized water. FIG. 7 shows an SEM image of ohmic metal and the source drain region of the device after the lift-off. This image clearly reveals that the recessed areas are not completely covered by the metal; moreover, it also shows that photoresist residues are not completely removed during this lift-off process. The presence of photoresist residues after ohmic metal lift-off is the second major weakness of this lift-off process. These residues are always present on devices created by this process. Attempts to remove the residues by extended soaking in the photoresist stripper are unsuccessful. More aggressive photoresist strippers can be used, but they attack the ohmic metal as well, resulting in degraded, or possibly non-functional, devices.
The fabrication of ohmic contacts is concluded by a rapid thermal anneal (RTA) in a nitrogen ambient. During this high temperature anneal, according to current theories of n-type GaN ohmic contacts, an AlTiN contact alloy with a low Schottky barrier height-to-n-type AlGaN transition area is formed by a chemical reaction between ohmic metal and under-laying semiconductor films. The formation of ohmic contacts is facilitated by the fact that GaN and AlGaN layers underneath the ohmic metal are due to loss of nitrogen converted to heavy n-type material, as nitrogen vacancies are donors in these III-V semiconductors. In FIG. 8 the device cross-section after RTA is shown with contacts 800 and transition areas 802 indicated. The electrical properties of GaN HEMT layers not covered by the ohmic metal during high temperature anneal are, due to absence of chemical reaction, not significantly altered during this step. In FIG. 9, a SEM image of the ohmic metal contacts and the source to drain region of an alloyed device is shown. This image reveals that the photoresist residues of FIG. 7 melt and flow during the high temperature annealing process and leave residues in the active area of the device. These residues get buried underneath the gate metal during subsequent processing steps. It is well-known that impurities underneath the gate metal adversely affect performance of field effect transistors (FETs).
A need exists in the art to overcome these limitations and to provide a method for fabricating GaN/AlGaN HEMTs that do not suffer from the limitations imposed by these unprotected recessed areas and residue problems.